EDGE/HSDPA

EDGE/HSDPA DESIGN AND IMPLEMENTATION

Topics

A two and a half day programme for engineers wishing to update themselves on the handset and RAN design and implementation issues of EDGE and HSDPA.

Objective

* To review present and likely future EDGE and HSDPA system options.
* To study the EDGE MAC and PHY and related hardware and software design implications.
* To study the HSDPA (and EUDCH) MAC and PHY and related hardware and software design implications.
* To compare EDGE and HSDPA with the W-CDMA FDD and TDD and CDMA2000 PHY and MAC
* To assess how changes in the Radio Layer and MAC layer will change handset hardware and software form factor and functionality
* To review how changes in the Radio Layer and MAC layer will change network hardware and software form factor and functionality.

Scope

This programme is directly relevant to design engineers and product and research team leaders working at silicon level on EDGE and HSDPA chip sets or at system level on EDGE/HSDPA transceiver design. It has particularly relevance for engineers and product and market managers involved in defining future cellular handset design policy and/or for managers and team leaders with responsibility for strategic technology planning. Typical delegate organisations include silicon vendors, handset and base station manufacturers, OEM and ODM design houses and network engineers with an interest in future EDGE and HSDPA PHY and MAC evolution.

DAY 1

18.30 Registration and Welcome

19.00 - 21.00 Dinner

21.00 - 22.00
EDGE and HSDPA Application Review
The impact of the radio layer and MAC layer on handset form factor, performance benchmarks over time, data rates, bit rates and symbol rates, PHY and MAC efficiency, impact of the radio layer and MAC layer on offered traffic and network loading, source adaptation, link adaptation and network adaptation (load distribution); uplink/downlink asymmetry and related EDGE and HSDPA terminal classifications, typical processor overheads for EDGE and HSDPA and practical implementation limitations.

DAY 2

08.00 - 09.00 Breakfast

09.00 - 10.30
EDGE PHY AND MAC (1)

EDGE and the 3GPP standards process, Release 99, Release 4, 5 and 6, present EGPRS handset classes, typical multislot configurations (Class 4, 6 ,8.10,12) and related performance considerations, Class A dual transfer mode single slot half mode and multi slot options,(the BCH,CS, PBCH and PDCH frame multiplex), channel coding and FEC/BEC (Type 1 and Type2 ARQ), link adaptation criteria (service requirements, system load, channel state, interference, channel coding, channel mode, interleaving, modulation), protection schemes and data rates(modulation and coding schemes), data throughput comparisons, interleaving depths ,dynamic window sizing, the EDGE band plan, impact of higher bit rates on convolutional encoding/decoding, reduced state sequence estimation and similar optimisation techniques, the mid amble and link quality measurements, measurement intervals andenhanced and fast power control, fast and normal power control interworking, frame lengths an drate matching, extended measurement reports and network assisted cell change, impact of EDGE on key performance indices, signalling and KPI, measurement reports and mobility management, limitations of present Voice over IP protocols, Release 6 voice over IP improvements, impact on the link budget.

10.30 - 11.00 Coffee

11.00 - 12.30 EDGE PHY AND MAC (2)
EDGE and AMR codec support, octal channels, half rate and full rate channels and wide band AMR capabilities, IP voice options and related source coding and channel coding optimisation, frame switching and rate matching, voice and session quality and voice quality testing methodologies, image and video encoding/decoding, typical processor overheads, static and dynamic rate matching in dual transfer mode, associated power control and signalling overheads, MAC performance in poor signal to noise, integration of link adaptation, incremental redundancy and source adaptation, higher layer TCP retransmission and/or UDP packet loss overheads, related issues of EDGE PHY and MAC efficiency (goodput ratios), link budgets, SAIC (single antenna interference cancellation) and other techniques,diversity and uplink and downlink combining, typical base station configurations, typical handset configurations (direct conversion, polar modulation ), conformance/performance benchmarks (including receive sensitivity and power drain for EDGE multi slot TX/RX platforms).

12.30 - 13.30 Lunch

13.30 - 15.00
HSDPA PHY AND MAC

The radio multiplex, the time slot multiplex, the code multiplex, adaptive modulation and coding, fast scheduling, fast retransmission, soft combining and incremental redundancy, frame size optimisation (2 millisecond versus 10 millisecond frame lengths/transmission time intervals) ,fast CQI (channel quality indication) and ACK/NACK signalling on the HS-DPCCH (high speed dedicated physical control channel, commonalities between the HSDPA MAC and the WiFi MAC (802.11 a and g), HSDPA latency compared with W-CDMA, EDGE Release 4, EDGE Release 99 and GPRS, latency requirements for IP voice and IP video, implications for EDGE deployment, adaptive multi rate coding options for HSDPA, single code, 5 code and 15 code data rates, coding rates, modulation (QPSK or 16 QAM), range and data rate trade offs,possible future enhancements including MIMO and enhanced uplink capabilities (EUDCH),

15.00 - 15.30 Tea

15.30 - 17.00 HSDPA HANDSET DESIGN
Typical DSP loading in a W-CDMA handset, typical DSP loading in a 5 code (Category 5/6),10 code(Category 9 )and 15 code(Category 10) handset, 3.6mbps, 10mbps and 14 mbps radio bearer functionality, additional processor load for MIMO support, dynamic range requirements, optimising the receiver chain, optimising the transmitter chain, issues of code orthogonality and code spur energy, merits/demerits of integrating EDGE and HSDPA functionality in a small form factor handset, PC card and SD card form factors and related PDA application footprints, typical power budgets for a 5 code/10 code/15 code device, possible design and performance optimisation opportunities, asymmetric coding (turbo coding in the UE, low density parity checks in the base station), application layer and physical layer integration,peak to average ratios implicit in multicode devices, dynamic range requirements, related test and measurement requirements.

19.00 - 21.00 Dinner

21.00 - 22.00 Special Interest Session
Delegates are encouraged to nominate topics of particular interest to be addressed in this session.

DAY 3

08.00 - 09.00 Breakfast

09.00 - 10.30
W-CDMA PHY AND MAC (1)

Code domain properties, merits/demerits of the OVSF code structure, spreading gain and scrambling, multiple codes per user, peak to average ratios, inner and outer loop power control, power control overheads and overall system gain limitations implicit in power control implementation, uplink and downlink slot and frame structure, transmission time intervals and related static and dynamic rate matching options, merits/demerits of 10 millisecond (frame by frame) admission control, composite signals and code spurs, typical EVM figures for adjacent code allocations, symbol EVM comparisons, code generation and matched filtering, typical processor overheads and MAC/PHY efficiency, comparison of present PHY and MAC performance with HSDPA PHY and MAC performance, flexible PHY/flexible MAC performance trade offs.

10.30 - 11.00 Coffee

11.00 - 12.30
W-CDMA PHY AND MAC (2)

Time domain properties, turbo coding and RAKE receiver design, typical delay spreads, jitter issues for higher bit rate applications, typical loads for uplink/downlink symbol rate processing, possible longer term integration with OFDM PHY (higher data rate PHY and MAC performance optimisation.

Frequency domain properties, 850 ,900, 1800, 1900 and 1900/2100 band handsets, possible future band plans,channel rasters, possible integration with DVB-H 5 MHz channel configurations

12.30 - 13.30 Lunch

13.30 - 15.00
CDMA 2000 PHY AND MAC

Code domain (Walsh code), time domain and frequency domain structure of CDMA2000, processing and implementation commonalities with W-CDMA, 3GPP1/3GPP2 work items including 1X Release 0 and Release 1, 1x EV-DO and 1X EV-DV(CDMA2000 Release C and Phase 2 data and voice), FDD/TDD system options including TD-SCDMA, other PHY and MAC options including WiFi wide area and wide area/ local area/personal area PHY and MAC integration.

15.00 - 15.30 Tea

15.30 - 17.00
EDGE/HSDPA/W-CDMA/CDMA2000 Handset, Base Station and Network Form Factor

Impact of dual transfer mode EDGE and HSDPA on handset and base station hardware and software form factor and functionality. Radio hardware design implications ,code footprints, memory and processor requirements, typical power budgets for hand held devices, typical power budgets for base station/node B platforms, size and weight constraints, future performance expectations.

Intersystem handover, RRC measurement reports and RANAP commands, local areas, routing areas and UTRAN routing areas, (URA's). PTMSI and URA identity tracking, update requests, protocol context requests, signalling flows, user plane and control plane configuration, UE behaviour mapping and feature mismatch detection, frame structures and intermeasurement protocols, handover stability and related power budget issues.

17.00 Summary and Close