Modelling and simulation of diamond wire sawing of silicon wafers

The driver of modern electronic gadgets is Moore’s Law, which says that the count of transistors on a chip doubles every two years. This drive creates a pressing need for innovative manufacturing methods to fabricate silicon which has continued to remain a wonder material for electronics. Historically, Loose abrasive slurry sawing (LSS) has remained the most popular process for producing PhotoVoltaic (PV) silicon wafers but environmental considerations and high productivity have pushed the usage of newly emerging technology known as fixed abrasive diamond wire sawing (DWS) to the forefront. A typical DWS process, entails sawing large cylindrical ingots of silicon (on a preferred crystal orientation) using a series of parallel wires. The surface quality of the cut wafers attained by this method inevitably results in the formation of undesirable micro-fractures and cracks on the silicon cut surface. Currently there is limited in-depth understanding of the DWS process as the process is still in its infancy. Therefore, a significant opportunity exists in developing the DWS production process. Development of a scientific understanding of the DWS process will improve the yield and reduce the manufacturing costs, as it can contribute up to 20% of the wafer manufacturing costs. In order to understand the process, the project will take a simulation based approach involving the use of high end Finite Element Analysis (FEA). Eventually the aims of this project are to predict: the material removal process as a function of the processing equipment and processing parameters, sub-surface damage in silicon, and the influence of the processing environment. Accordingly, the following work packages will be executed: WP1 (1 year): Development of baseline models of the DWS process using FEA on generic processes and materials. WP2 (2nd year): The addition of wear and sub-surface damage models and the validation of integrated...