High Performance Computer Architecture - Georgia Tech
Course
Online
Description
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Type
Course
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Methodology
Online
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Start date
Different dates available
The HPCA course covers performance measurement, pipelining, and improved parallelism through various means.
Facilities
Location
Start date
Start date
Reviews
Subjects
- Performance
- Computer Architecture
- Law
- IT Law
- Architechture
- MultiCores
Course programme
Approx. 0
Built by Join thousands of students Course SummaryThis class is offered as CS6290 at Georgia Tech where it is a part of the Online Masters Degree (OMS). Taking this course here will not earn credit towards the OMS degree.
The course begins with a lesson on performance measurement, which leads to a discussion on the necessity of performance improvement.
Pipelining, the first level of performance refinement, is reviewed. The weaknesses of pipelining will be exposed and explored, and various solutions to these issues will be studied. The student will learn hardware, software, and compiler based solutions to these issues.
Why Take This Course?You will explore the fascinating field of computer architecture, studying the many methods developed to enhance computer performance. The trade-offs and compromises associated with each design and their effects on processor development is a captivating story that will make you a better computer scientist, regardless of your field of study.
Prerequisites and RequirementsYou must be familiar with Assembly code, the C or C++ programming language, Unix or Linux, and the basics of pipelining.
See the Technology Requirements for using Udacity.
Syllabus Lesson 1: Introduction and Trends- Computer Architecture & Tech Trends
- Moore's Law
- Processor Speed, Cost, Power
- Power Consumption
- Fabrication Yield
- Measuring Performance
- Benchmarks Standards
- Iron Law of Performance
- Amdahl's Law
- Lhadma's Law
- Pipeline CPI
- Processor Pipeline Stalls
- Data Dependencies
- Pipelining Outro
- Branch Prediction
- Direction Predictor
- Hierarchical Predictors
- PShare
- If Conversion
- Conditional Move
- MOVc Summary
- ILP Intro
- RAW Dependencies
- WAW Dependencies
- Duplicating Register Values
- Instruction Level Parallelism (ILP)
- Improving IPC
- Tomasulo's Algorithm
- Load and Store Instructions
- Exceptions in Out Of Order Execution
- Branch Misprediction
- Hardware Organization with ROB
- Memory Access Ordering
- When Does Memory Write Happen
- Out of Order Load Store Execution
- Store to Load Forwarding
- LSQ, ROB, and RS
- How Memory Works
- One Memory Bit SRAM
- One Memory Bit DRAM
- Fast Page Mode
- Connecting DRAM To The Processor
- Flynn's Taxonomy of Parallel Machines
- Multiprocessor Needs Parallel Programs!
- Centralized Shared Memory
- Distributed Shared Memory
- Message Passing Vs Shared Memory
- Shared Memory Hardware
- SMT Hardware Changes
- SMT and Cache Performance
High Performance Computer Architecture - Georgia Tech