Theory of parallel hardware

Lectures: 2 sessions / week, 1.5 hours / session

This class covers mathematical foundations of parallel hardware, from computer arithmetic to physical design, focusing on algorithmic underpinnings. Topics include Arithmetic Circuits, Parallel Prefix, Systolic Arrays, Retiming, Clocking Methodologies, Boolean Logic, Sorting Networks, Interconnection Networks, Hypercubic Networks, P-completeness, VLSI Layout Theory, Reconfigurable Wiring, Fat-trees, and Area-Time Complexity.

The class is suitable for both theory and systems students. M.Eng. students can use the class to satisfy their Engineering Concentration in either Theoretical Computer Science or Computer Systems and Architecture Engineering.

A detailed schedule of topic coverage will appear in the course calendar.

The official prerequisites for the course are 6.046J (Introduction to Algorithms) and 6.004 (Computation Structures) (or courses covering equivalent material). No computer architecture knowledge is necessary.

The course consists of two primary components: problem sets and a final exam. Emphasis will be on the problem sets.

Throughout the class, collaboration is encouraged. The goal of homeworks is to give you practice in mastering the course material. Consequently, you are encouraged to collaborate on problem sets. You must write up each problem solution by yourself, however, even if you collaborate with others to solve the problem. If you do collaborate on homework, you must cite in a scholarly manner all of your collaborators.

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